/*
	psr.v
	Templates for processor status register
	
	This project and file(s) are released under GNU GPL v3.
	Please find license file from root directory.
	Meng Sun (c) 2013 <leon.meng.sun@gmail.com>
*/

module psr (OVi, OVEN, CBi, CBEN, ZRi, CLK, nRESET, GEN, OVo, CBo, ZRo);

input OVi, OVEN, CBi, CBEN, ZRi, CLK, nRESET, GEN;
output OVo, CBo, ZRo;

wire OVi, OVEN, CBi, CBEN, ZRi, CLK, nRESET, GEN;
reg OVo, CBo, ZRo;

always @ (posedge CLK or negedge nRESET)
begin
	if (nRESET == 0) /*Async-Reset*/
	begin
		OVo <= 1'b0;
		CBo <= 1'b0;
		ZRo <= 1'b0;
	end else /*Async-Reset released and general EN applied*/
	begin
		if (GEN == 1 && OVEN == 1)
		begin
			OVo <= OVi;
		end
		if (GEN == 1 && CBEN == 1)
		begin
			CBo <= CBi;
		end
		if (GEN == 1)
		begin
			ZRo <= ZRi;
		end
	end
end

endmodule